Full length articleLow temperature epitaxy of high-quality Ge buffer using plasma enhancement via UHV-CVD system for photonic device applications
Introduction
The need for high speed electronics has driven research efforts to develop photonic devices that are compatible with complementary metal–oxide–semiconductor (CMOS) technology [1]. To satisfy the industrial goal for high volume production with low cost, these photonic devices have to be grown monolithically using group IV semiconductors with CMOS devices. In addition, the growth process of photonic devices has to be at low temperatures to prevent CMOS devices from any thermal damage.
High quality relaxed Ge buffer layers on Si substrates are used to compensate the large lattice mismatch between Si and the subsequent group IV alloys, such as GeSn [2,3]. Because of the large lattice mismatch (4.2%) between Ge (5.65 Å) and Si (5.43 Å), Ge-on-Si is subject to two major problems: (i) the high surface roughness that results from Stransky-Krastanov (S-K) growth mode; and (ii) the high threading dislocation density (TDD) that appears to release the strain. The high TDD deteriorates device performance [4] while surface roughness hinders the integration with the subsequent active layers [5]. Therefore, a systematic growth approach of high-quality Ge buffer layers at low temperatures is highly desired for future Si photonics and CMOS integration.
Researchers in the field are developing growth techniques to address these problems. Growing a Ge buffer layer on an ultrathin silicon-on-insulator [6] and on graded SiGe virtual substrate [7] are examples of efforts to improve the material quality of Ge films. However, a two-step method followed by high temperature cycling or annealing step is the conventional growth approach. The first step in the two-step method is a thin Ge layer that is grown at low temperature (LT), typically in the range from 340 to 450 °C. The role of this step is to promote the layer-by-layer growth mode and relax the elastic energy, which limits and confines dislocations [8]. The second step is the growth of the high temperature (600–850 °C) Ge layer, which lowers the dislocations further and enhances the deposition rate for a thicker Ge buffer layer [9,10]. Finally, the Ge buffer layer is annealed, either by single step or multi-cycle annealing, under high temperatures (700–900 °C) to lower the TDDs by up to two orders of magnitude [11,12]. Even though this growth approach produces high quality Ge buffer layers, the high temperature processing increases the thermal budget and could limit the compatibility with CMOS technology [13]. A more sound solution to lower the growth temperature while maintaining high deposition rates with appropriate material and optical qualities is by assisting the dissociation process with energetic plasma ions [[14], [15], [16], [17], [18]].
We initially investigated the one-step Ge-on-Si epitaxy using plasma enhanced chemical vapor deposition (PECVD) in an ultra-high vacuum (UHV) system [19]. However, the material quality was not at the level suitable for device applications. In this work, we grow Ge-on-Si using the two-step method following the same growth procedure to improve the material quality further. The two-step Ge buffer layers were grown in the low temperature range. The post growth thermal processing was eliminated in order to reduce the thermal budget further. With the help of plasma enhancement, the second step temperature was gradually dropped from 600 to 450 °C. Material and optical characterization of selected Ge buffer layers indicate that the PECVD technique could maintain high quality Ge film with low root mean square (RMS) surface roughness. A further comparison step was done to examine material and optical properties of GeSn films that were grown on the PECVD and CVD Ge buffer layers grown with PECVD compared CVD growth.
Section snippets
Experimental
In this study, a capacitively coupled plasma (CCP) setup in the UHV-CVD growth chamber with a base pressure of 3 × 10−9 Torr was utilized. The CCP was fed by a 13.56 MHz radio frequency (RF) power supply that is matched by an L-shaped automatic impedance matching network. Fig. 1 shows the PECVD configuration. The substrate holder within the upper electrode setting was powered by the RF power source while the lower electrode assembly was grounded. The electrode spacing was fixed at 20 mm. In
Growth optimization
A single step Ge layer was first grown in the range of temperatures from 400 to 525 °C and the RF power range from 0 to 30 W to optimize the growth conditions. Fig. 2(a) shows the variation of thickness with RF power at a fixed wafer temperature of 400 °C. As compared to the CVD method at P = 0 W, the thickness increases monotonically until 5 W, and starts to decrease beyond 5 W. It must be noted that the substrate holder was powered; hence it is subjected to ion bombardment during deposition.
Conclusion
Two-step high quality Ge buffer layers were successfully grown using PECVD technique in an UHV growth environment. Systematic material and optical characterizations indicate that this method can definitely produce Ge buffers that were grown at moderate temperatures with similar quality to a Ge buffer that was grown using the conventional CVD technique at high temperature. A 75 °C reduction in the second step growth temperature was achieved with the help of plasma enhancement. Our growth
Acknowledgement
The work was supported by Air Force Office of Scientific Research (AFOSR) (FA9550-14-1-0205, FA9550-16-C-0016) and National Aeronautics and Space Administration Established Program to Stimulate Competitive Research (NASA EPSCoR) (NNX15AN18A). The help of Dr. M. Benamara and Dr. A. Kuchuk's, from the Institute for Nanoscience & Engineering at the University of Arkansas, on taking TEM imaging and XRD-RSM measurements is also acknowledged.
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